assembly - ARM NEON my calculation result when there are negative numbers is incorrect -

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I'm trying to calculate the use of neon in assembly ((200 * (53-255) / 255 ) + 255, which should be approximately 97%

I have tested here on the Dual Core Cortex-A7 ARM CPU Tablet and the result is 243 which is not true. How do I apply this 97 should be done to get the correct result?

d2 included 200.200.200.200.200.200.200.200
d4 included 255.255.255.255.255.255.255.255
d6 53,53 included, 53, 53,53,53,53,53 

  vsub.s8 D8, D6, D4 (53 - 255 results D8 = 54,54,54,54,54, 54,54) vmull.s8 q5, d8, d2 (54 * 200 results Q5 = 244,48,244,48,244,48,244,48,244,48,244,48) vshrn.s16 D12, divided by 255 result in D12 = 244,244,244,244,244,244,244,244) vadd.s8 d5, d4, d12 ( Last result d5 = 243,243,243,243,243,243,243,243)

After

243 is absolutely correct.

Alpha channel is an unsigned 8bit value, you should use u8 or u16 s8 and s16 .

While for standard arithmetic, where the width is the same, it does not matter, it is a completely different story for multi-long running.

And that is not the reason there are two different instructions for the ARM UMULL and SMULL for long multiplication, even when one < Code> MUL instructions for both signed and unsigned qualitative 32 bit.

54 * 200 is simply impossible because 200 is interpreted as signed -5 in signature multiplication. 

  = & gt; 54 * -56 = -3024 -3024/256 = -12 -12 + -1 = -13 // 255 = -1 -13 = 243

You really have to change the code > Vmull.s8 to vmull.u8 : 

  => 54 * 200 = 4800 2800/256 = 18 18 + -1 = 17

Honestly, I do not know how to expect 97 results with above ops: How is it

In addition, & gt; & Gt; 8 should be any type of alpha mixture as is not / 255 It's just a bad approximation, you might think that you can stay at an exact level, but after mixing alpha enough FAR is enough.

You have to do something wrong.


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